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SiFive, a designer of chips based on the RISC-V computing platform, announced a series of new AI chips for high-performance AI workloads.
The SiFive Intelligence XM Series is designed for accelerating high-performance AI workloads. This is the first intellectual property from SiFive to include a highly scalable AI matrix engine, which accelerates time to market for semiconductor companies building system-on-chip solutions for edge IoT, consumer devices, next-generation electric and/or autonomous vehicles, data centers, and beyond.
As part of SiFive’s plan to support customers and the broader RISC-V ecosystem, SiFive also announced its intention to open-source a reference implementation of its SiFive Kernel Library (SKL).
The announcement was made at a SiFive press event on Tuesday in Santa Clara, where executives discussed the leadership role the RISC-V architecture is playing at the core of AI solutions across a diverse range of market leaders and provided an update on SiFive’s strategy, roadmap, and business momentum.
The open solution
Patrick Little is CEO of SiFive.
Patrick Little, CEO of SiFive, said in an interview with VentureBeat that customers in the semiconductor, systems, and consumer markets have come to appreciate the software strategy behind SiFive and RISC-V.
He noted that products with more than 10 billion SiFive cores have shipped to date. Little also highlighted that SiFive has invested more than $500 million in R&D and is selling to the top semiconductor leaders and hyperscalers, with over 400 design wins.
The RISC-V architecture has software that is an open standard interface, allowing various types of cores to connect to it. This enables customers using SiFive designs to choose their accelerators for AI and other applications without worrying about software compatibility, according to Little.
While major players in AI like Nvidia have their proprietary GPU architectures, smaller companies develop their accelerators. However, software programmers prefer a consistent interface, which is provided by RISC-V solutions like SiFive, as it allows for smoother transitions between different accelerators.
The RISC-V open standard software interface encourages the evolution of the standard over time and reduces reliance on a single vendor.
SiFive has gradually progressed from embedded cores in the 1990s to adding its first vector processor in 2021, now expanding into AI solutions. Customers can use it as a data flow processor as the front end to their processor alongside changing backend AI accelerators.
Little explained, “They don’t want to keep adapting to new AI software. So we introduced a RISC-V vector processor to bridge that gap. AI processors evolve quickly, models change frequently, and software developers want stability over the long term.”
SiFive’s new accelerator, the matrix multiplication engine announced with the XM product line, complements its vector processing capabilities, offering customers a comprehensive AI solution.
SiFive’s pitch.
For customers seeking an alternative to Nvidia, RISC-V offers a non-proprietary solution with support from various companies, making it an attractive choice over proprietary architectures.
Little expressed confidence in SiFive’s ability to match Nvidia’s performance levels, stating, “We believe our solution can scale to Nvidia level performance.”
He added, “Many companies are recognizing the advantages of an open processor standard as they adapt to the rapid changes in AI. AI aligns with SiFive’s strengths in performance per watt and our unique ability to customize solutions for customers.”
SiFive’s new XM Series provides a highly scalable and efficient AI compute engine by integrating scalar, vector, and matrix engines. Customers of the XM Series can benefit from efficient memory bandwidth and high performance per watt for compute-intensive applications.
Krste Asanovic, SiFive’s chief architect, highlighted the versatility of the RISC-V architecture in efficiently supporting specialized computing engines, mixed-precision operations, vector instructions, and specialized AI extensions, making RISC-V AI accelerators attractive to major datacenter companies.
The RISC-V trend.
As part of his presentation, Asnovic provided further details on the new XM Series, expanding SiFive’s Intelligence Product family while maintaining high performance per watt for compute-intensive applications.
Each cluster of the XM Series, featuring four X-Cores, can deliver 16 TOPS (INT8) or 8 TFLOPS (BF16) per GHz. The chip boasts 1TB/s of sustained memory bandwidth per XM Series cluster, enabling memory access via a high-bandwidth port or a CHI port for coherent memory access. SiFive envisions system creation without a host CPU or based on RISC-V, x86, or Arm platforms, with sampling of solutions already underway.
SiFive will be present at the RISC-V Summit North America on October 22-23, 2024, in Santa Clara, California, with a team of 500 individuals.
Little proudly stated, “We’ve become the gold standard of RISC-V.”
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FAQs
Q: What is SiFive’s latest announcement?
A: SiFive has introduced the Intelligence XM Series, a line of new AI chips designed for high-performance AI workloads.
Q: What sets apart SiFive’s AI solutions?
A: SiFive’s AI solutions feature a highly scalable AI matrix engine and a legacy of offering high performance per watt for compute-intensive applications.
Q: Why is RISC-V architecture significant in the AI industry?
A: The open standard interface of RISC-V allows for a seamless transition between different AI accelerators, providing flexibility for customers and reducing software compatibility concerns.
Credit: venturebeat.com
